Control in Semiconductor WaferManufacturingAbbas Emami-Naeini and Dick de RooverAbstract: A semiconductor wafer undergoes a wide range ofprocesses before it is transformed from a bare silicon wafer to onepopulated with millions of transistor circuits. Such processesinclude Physical or Chemical Vapor Deposition, (PVD, CVD),Chemical-Mechanical Planarization (CMP), Plasma Etch, RapidThermal Processing (RTP), and photolithography. As feature sizeskeep shrinking, process control plays an increasingly importantrole in each of these processes. A model-based control approach isan effective means of designing commercial controllers foradvanced semiconductor equipment. We will give an overview ofthe applications of advanced control in the semiconductor industry.It is our experience that the best models for control design borrowheavily from the physics of the process. The manner in whichthese models are used for a specific control application depends onthe performance goals. In some cases such as RTP andlithography, the closed-loop control depends entirely on havingvery good physical models of the system. For other processes suchas CMP, physical models have to be combined with empiricalmodels or are entirely empirical. The resulting multivariablecontrollers may be in-situ feedforward-feedback or run-to-runcontrollers, or a combination thereof. The three case studies thatare presented in this paper (RTP, CMP, and lithography) arerepresentative of the leading edge applications of advanced controlin the semiconductor industry.I. INTRODUCTIONA semiconductor wafer undergoes a wide range ofprocesses steps before an integrated circuit is produced [1][3]. Figure 1 illustrates some of the steps in themanufacturing of an Ultra Large Scale Integrated (ULSI)Circuit such as a microprocessor [4]. The key steps arePhysical Vapor Deposition (PVD) and Chemical VaporDeposition (CVD), photolithography, Plasma Etch, RapidThermal Processing (RTP), and Chemical-MechanicalPlanarization (CMP). The standard practice for many yearswas to perform these steps in batches on many wafers at atime to produce large numbers of identical chips. Inresponse to the demand for ever smaller critical dimensions(CD) of the devices on the chip, and to give more flexibilityin the variety and number of chips to be produced, themakers of the tools for fabrication of integrated circuitsThe authors are with SC Solutions, Inc., 1261 Oakmead Pkwy,Sunnyvale, CA 94085. A. Emami-Naeini is also a ConsultingProfessor of Electrical Engineering at Stanford University.Corresponding author’s e-mail: [email protected] turned to single-wafer processes which require precisecontrol. Interestingly, the processes that make the chip arenow beginning to use controllers which require thecomputational power of the chips being fabricated. Anothertrend is to conduct several related steps in a “cluster”comprising of several chambers integrated into a singlemachine.The processes that deal with producing the integratedcircuit (IC) on the wafer are commonly referred to as “frontend” processes, whereas “back-end” processes deal withwire bonding and packaging the IC. In this paper, we willfocus on the “front-end” processes that produce the IC onthe silicon wafer, and the increasingly important role ofcontrol. Front-end tools are used in a few hundred processsteps to produce a ULSI circuit on a wafer. Thin layers ofelectrical conductors, semiconductors, and insulators aredeposited with intervening steps that implant and activatedopants, anneal, etch patterns, or polish the wafer surface.A thin film deposition process may be a Physical VaporDeposition where the source atoms are transported to thewafer by various means or may involve chemical processesin which case it is called Chemical Vapor Deposition. BothPVD and CVD can be driven by thermal processes such asRapid Thermal Processing for post-implant anneal andRapid Thermal CVD for oxidation, silicon epitaxy, etc.Plasmas are also used to drive PVD and CVD processes,and used for etching dielectrics and metal in building theICs, see Figure 4.For several decades, semiconductor manufacturersfocused on finding processes that were passively stable (i.e.,processes that were insensitive to input variations). Theprocess engineer used experimental trial-and-errorapproaches to specify processing protocols (recipes) forvarious process steps. But this approach has becomeincreasingly difficult to sustain over the last decade as thesemiconductor industry extended Moore’s Law well into thefuture by increasing the spatial density of ICs as well asincreasing the size of wafers to 300 mm in diameter. Forexample, Intel’s new Tukwila microprocessor packs overtwo billion transistors on a die size of 21.5x32.5mm2. Theseintegrated circuits are fabricated with 65 nm feature size.Such increasing densities and shrinking feature sizes resultin increasingly tighter tolerances, which means there is lessslack (i.e., “error budget”) available in the manufacturing1

Figure 1. Steps in making an integrated circuit [4].process. Hence precision control is becoming a necessity.As a result, integrated computer-controlled waferfabrication is playing an increasingly important role in thesemiconductor industry [5-12].Control is ubiquitous in semiconductor manufacturingas shown in Figure 1 which shows the major steps in thefabrication of ultra large-scale integrated (ULSI) circuitssuch as microprocessors along with some of the associatedcontrol aspects. In production of the silicon ingot, controlof melt temperature, rotation speed, and pull rate isrequired. In CMP, control of film thickness and removalrate is necessary. In etch, the control of plasma power anduniformity is required in addition to control of thetemperature of the chuck. In lithography control of positionof the wafer stage with nm accuracy is necessary andcontrol of temperature for the bake process is veryimportant. In RTP, precise control of temperature is a must.Control of pressure, temperature, and flow is ubiquitous.Robotics (wafer handling) is omnipresent in the fab.The semiconductor manufacturing process flow, whenhighly simplified, can be divided into two primary cycles oftransistor and interconnect fabrication. The transistor cycleis the basis of the most advanced chips, see Figure 2. Witha wafer as the starting point, it involves epitaxial silicon(Epi), dielectric deposition, photolithography, etch, wafercleaning, ion implantation, and RTP processes. Theinterconnect cycle is the one used with high performancecopper interconnects that have replaced the conventionalaluminum interconnects, see Figure 3. It involves dielectricdeposition, photolithography, etch, metal deposition usingPVD, electroplating, and CMP leading to the finished chip.After processing the chips are coated with plastic orceramic packaging to seal them tightly.The starting point for a model-based control designstrategy is to understand these physical processes, followedby derivation of mathematical models. The high-ordermodels are tailored for control through model-orderreduction and are validated using experimental data.Finally, feedback controllers are designed using thesereduced-order models and tested in closed-loop simulationsbefore the control code is downloaded on to the real-timecomputer used for equipment control.In this paper, we briefly survey the control issues forsome of the important front-end tools followed bydiscussions on modeling for control and some of the controlstrategies adopted in the industry including feedback andrun-to-run control. In the three following sections wedescribe in greater detail the application of modeling andmodel-based control to three processes: RTP, CMP, andlithography coater/developer systems.II. OVERVIEW OF TYPICAL WAFER PROCESSINGEQUIPMENTAs described earlier, there are many process stepsrequired to produce a ULSI circuit on a wafer. Thephysical processes can be organized into groups thatapproximately correspond to the type of equipment thatwould be used to perform that process. In this section wediscuss some of the important types of semiconductorprocessing equipment and the related control issues.2

Figure 2. The transistor cycle in manufacturing an integratedcircuit.Figure 4. Some representative process steps for producing anintegrated circuit.Figure 3. The copper interconnect cycle in fabricating anintegrated circuit.Specifically we discuss PVD, CVD, thermal, etch,photolithography, and CMP systems.An understanding of the aims of various semiconductorprocesses helps one better understand the function of theassociated equipment (see Figures 1- 3). At the start of thewafer processing chain, large cylinders of single-crystalsilicon, ingots, are sliced into wafers, ground to a specificthickness (e.g., 300 mm diameter wafers are 0.775 mmthick) and polished to be smooth. A thin layer of epitaxial(i.e., single crystal) silicon, or “epi”, is deposited usingCVD and the wafer is ready for use in a fabrication facility(commonly called a fab). All the transistors (and diodes,resistors, etc.) are fabricated on this epi layer. Afterfabrication, the transistors are electrically interconnected.Figure 4 shows a sample sequence of the processing steps.This example illustrates how one can produce a localizedregion in the wafer that has different electrical properties(P- or N-doped) than its surroundings. Figure 4 shows anoxide layer being deposited (or formed by oxidizing surfacesilicon), a pattern being etched into the oxide to expose aspecific pattern of silicon, impurities being subsequentlyimplanted into the exposed silicon, and finally thoseimpurities being diffused to form a localized region that iselectrically distinct. In a typical IC there can be hundreds ofsteps and multiple layers of metal interconnect inlayed intopatterned dielectric [1]-[3].However, the main point to be made here is that manyiterations of deposition, planarization, photolithography,etch, and more ‘deposition and planarization’ is a centralcharacteristic of integrated circuit fabrication. A moredetailed exposition here is beyond the scope of this paper,and the interested reader should consult a standard book onthis subject, e.g., [1]-[3].For the control engineer interested in controlling theprocessing equipment, the main issues can be summarizedwith the following five questions:1. What are the processes involved (physics)?2. What are the actuators (inputs)?3. What sensors are available (outputs)?4. What are the performance metrics?5. What are the disturbances and uncertainties?In the remainder of this paper, we will briefly discuss thesefive aspects for the three classes of semiconductorequipment that were noted earlier: RTP, CMP, andlithography processes.III. CONTROL OF SEMICONDUCTOR PROCESSESFigure 5 shows a general control structure that addressesthe process control requirements. The three components ofthe controller are (1) the planner, (2) the regulator, and (3)the estimator. The feedback controller consists of theregulator and the estimator. The planner translates thedesired product characteristics into an ideal (or nominal) setof process inputs (controls) and reference signals and is thefeedforward controller. Depending on the process, theinputs might be constant or follow a very complex time3

Idealactuation(recipe)desired finalprocessvariablesPathPlannerConstraintsideal trajectoryof processvariable -estimate riableEstimatordisturbancesand sensor noise uiddepositionstrajectoryof sProcess Modelingphysics & chemistrymodel reductionsystem identificationFigure 5. General control structure for semiconductor industry.history. If the model and the planner were perfect and therewere no process disturbances, the planner would be all thatwould be required—but in the real world this is never thecase. Thus, the regulator uses the difference between thedesired product characteristics and those actually beingproduced to compute corrections to the nominal processinputs computed by the planner; this is the feedbackcontroller.Together, the planner and the regulatorconstitute the model-based control portion of the solution.A further complication arises because in many cases it isimpossible to measure the relevant product characteristicsin-situ (either because it is too expensive or the sensor hasnor been invented yet). Thus, the estimator uses a model ofthe process conditions that can be measured in real-time.The estimator constitutes the model-based sensing portionof the solution. By using a process model, the estimatorcan be designed to infer the critical variables from thesensed variables. Hence, model-based estimation is ameans to “transcend” inadequacies in sensing. Theregulator and the estimator have to be on-line (real-time)functions. The planner is nominally designed off-line, butit could also be constructed to utilize feedback on a run-torun basis.Figure 6. Model-Based control system design.A. Model-Based ControlThere are many advantages of the model-based controlapproach. The controller can be “tested” for a wide rangeof wafer/process variations in simulation. A physicalmodel of the system can be modified to answer “what if”tests for equipment/process modifications. The approachprovides the ability to perform controller development inparallel with chamber (reactor) development. In thesemiconductor industry access to the equipment is apremium and it is a great advantage to be able to carry outthe control system design without access to the equipment.The approach provides a tool for trouble shooting torespond to problems in the field. The model-basedapproach provides the opportunity for model-based faultdetection isolation accommodation. It is generally true inthe semiconductor industry that the next generationequipment is a modification of the current system. Hencethe availability of the model provides a path for continuedproduct improvement.Figure 6 shows the model-based control design cycle.The first step in the development of a model-basedcontroller is the development of a physical model whichaccurately reflects the actual behavior of the system to becontrolled. For example, for a Rapid Thermal ProcessingSystem (RTP) a detailed thermal model of the system isdeveloped.The model contains unknown physicalvariables that are identified from experimental data. Acomparison of the model response with the actual systemoutput provides a measure of model accuracy. The nextstep in the cycle is the development of a model-basedcontroller. Using the model, we use a variety of advancedfeedback control designs to derive candidate controllers.The closed-loop system is then simulated in a graphicalblock diagram simulation environment to assess the meritsof various candidate controllers. Once a satisfactorycontroller has been identified which meets thespecifications (e.g., temperature uniformity for RTP), realtime code can be generated automatically to run on a rapidprototyping platform which will control the equipmentdirectly. The controller’s performance on the actualequipment can be determined and design iterations can becarried out if necessary. When satisfied with the controllerperformance, the controller can be targeted to a variety ofcomputers or embedded microprocessors.B. Types of ControlAt the highest level, control of a fab involves the control ofwafer movements and scheduling of the individual piecesof processing equipment. Highly sophisticated and flexiblemanufacturing can only be achieved by a combination ofcomplex scheduling and real-time control systems. Thenature of the scheduling involves discrete event systemstheory and related optimization. Robots are routinely usedto automate wafer transport between process equipment,wafer handling within process equipment, and within a4

cluster. Hence robotic control plays an important role in afab. The next level is the control of the individual pieces ofprocess equipment, which is the main focus of this paper.Finally there are control of fluid and material flow,temperature, and pressure where the use of Proportionalplus Integral (PI) [4] is ubiquitous. As already mentioned,there are at least five types of control strategies employedin the use of the process equipment: open-loop, end-point,in-situ feedback, feedforward, and run-to-run control.Open-loop control has been the most common strategyuntil recently; actuators are held constant. End-point controluses an in-situ sensor to detect the end-point of the process,i.e., to detect when the desired process result has beenachieved, at which point in time the process is stopped.This type of control is common in processes such as etch.In-situ feedback control is used for real-time feedbackcontrol using real-time sensors. Examples includetemperature control in RTP using pyrometers and metallayer thickness control in CMP using eddy current sensors.Feedforward control is employed through provision fornominal control settings as discussed above. Since we wishto move the system from one operating point to anotheralong a specified trajectory, we can determine theapproximate inputs to accomplish this. Consequently, wecan apply this input directly to the system.Thefeedforward controller should approximate the inversedynamics of the plant. An example in RTP is the use ofnominal lamp settings and the associated temperatureprofiles. Another form of feedforward is the use ofinformation on the end product from the previousequipment. An example in CMP is the use of incomingcopper profile from the electroplating for the start of theplanarization step.Run-to-run control is a form of discrete process controlin which a product recipe is modified using in-line or exsitu metrology between “runs” to minimize or eliminateprocess drifts, and variability (due to the nonlinear nature ofthe relationship between product characteristics and whatcan be measured in real-time in the system) [13]. In effectthe discrete process “sample rate” is the length of theprocess run.An example of run-to-run control isadjustment of sensor or reference temperature “bias” inRTP or adjustment of polish time in CMP.IV. RAPID THERMAL PROCESSING: RTPA broad class of semiconductor processing is thermalprocessing. Thermal processing systems typically involveramping up and ramping down the wafer temperature in acontrolled way to facilitate some thermally-driven processsuch as oxidation, anneal, diffusion, or chemical vapordeposition (CVD). In the case of implant anneal, an ionimplant system (a type of PVD process) first implants alayer of dopant (e.g., boron or arsenic atoms) into thesurface layers of a wafer. The impact of these atoms (ions)causes damage to the crystal structure that mustFigure 7: Applied Materials' RTP system (Courtesy AppliedMaterials).subsequently be annealed using a thermal process wherecrystal defects diffuse out of the wafer. To prevent excessdiffusion of the dopant away from the surface and providethe thinnest possible layer of doped (and activated)semiconductor material, it is desirable to use RTP to annealthe damage.In RTP equipment, one can typically raise thetemperature quickly (200 C/s or more) from a relativelylow temperature to a temperature above 1000 C whilemaintaining good within-wafer uniformity, see Figure 7. Inaddition to rapid thermal anneal (RTA), rapid thermaloxidation (RTO) and other processes use RTP equipment.Modified single wafer RTP-like systems are also used forCVD (RTCVD). Other types of thermal processing aredone using furnaces where large numbers (25 ) of wafers(batch) can be processed at once. These batch furnacesystems tend to be slower in terms of ramp-up, ramp-down,and process times, but the time per wafer can be high ifenough wafers are processed at a time. Historically almostall thermal processing was done using batch furnaces, butthe trend is increasingly toward single wafer systems,because of better control of the individual wafers.A schematic cross section diagram of an RTP system isshown in Figure 8 [14]. A bank of over 400 tungstenhalogen lamps is arranged in a honeycomb pattern whichconstitutes the actuators of the system. Seven pyrometersare used to measure the temperature on the backside of thewafer at a rate of 100Hz. The wafer is lifted by magneticlevitation and is rotated during processing. The dominantphysical phenomenon in RTP is radiative heat transfer.Actuators in RTP are the lamps that heat the wafer.Typically multiple lamps are used to provide a high spatialresolution across the wafer as well as high power to quicklyheat the wafer. Sensors typically include pyrometers, whichare ideal sensors for measuring radiation of moving objects(rotating wafer). Uncertainties in RTP include radiativeproperties of wafer and chamber walls.5

the wafer where the temperatures are sensed (usually fivepoints or less), there could be large departures from therecipe temperature at several points where the temperaturesare not measured. Our controller solves the problem usingan estimate of the maximum error based on modelprediction. This is a very important advantage in applyingmodel-based control to RTP.We approach the control problem by using lineardesign techniques [5]. Hence, we have to derive alinearized model of the system from the nonlineardiscretized model. Two alternatives are possible. The firstoption is to directly linearize the reduced nonlinear modelof the system. The second option is to linearize the fullnonlinear model, and then use the POD reduction algorithm[5].Figure 8. Cross sectional diagram of Applied Materials’ RadiancePlus RTP system [14].We describe our strategy to design controllers for the RTPsystem next. Precise temperature control is critical toobtaining required high performance. In an RTP chamber,many heaters affect the temperature at each location whereit is measured. Multi-Input Multi-Output (MIMO) controlthat explicitly accounts for the influence of each heatsource on each temperature sensor is needed for highperformance. With such strong physical coupling, it isdifficult to obtain high performance control of thetemperature profile using single loop conventionalcontrollers commonly used in industrial applications.Moreover, since previous approaches relied heavily onprecise calibration, small changes in chamber design orwafer geometry can require substantial and time-consumingefforts in control re-design. The necessity for meetingextremely high performance specifications requires that thecontrol system be optimal with respect to the specificprocess being controlled, and be robust to cope withvariations in the system components.Controller structureThe controller structure for RTP is similar to the generalstructure shown in Figure 5. The feedforward controllertakes advantage of the known reference temperatures tocompute a suitable control signal that is injected in theclosed-loop. Due to the relatively simple structure of afeedforward controller, it can be nonlinear and can be baseddirectly on the nonlinear RTP model. An importantpractical consideration is whether the reference is known tothe feedforward controller a priori, or if it is provided inreal-time. The latter case is the most common in practice,but the first option allows a global optimization of thetrajectory rather than point-to-point optimal commands. Itis assumed here that the reference will be provided in realtime.The feedback controller is based on a linear design, asdynamic output feedback is required. Its task is to addressany mismatch that arises from the limited fidelity of thefeedforward controller, and to deal with the processdisturbances. The feedback controller includes logic todeal with integrator anti-windup due to lamp saturationnonlinearities [4].Control Problem FormulationTo be able to design temperature controllers that achievethe desired wafer thermal performance, it is important toconsider the performance specifications in terms oftemperature control quality. The temperature controlproblem in an RTP system typically has the followingdemands to ensure uniform wafer properties:1) Steady-state tracking, better than 1 C, preferably zeroerror;2) Insensitivity to sensor noise, process disturbance andvariations, such as wafer-to-wafer variations (e.g.,variation in wafer emissivity), changes in temperatureset points, etc.These demands pose a substantial challenge for controllerdesign, since very high precision has to be obtained whileretaining sufficient robustness in the design. It is noted thateven if the controller has zero-tracking errors at points onFigure 9. RTP spike anneal temperature profile [14].6

Figure 10: Comparison of model simulation (left column) withactual measurements (right column) on a 200 mm single-waferRTP chamber during a fast-ramp process [5].The prefilter smoothes the temperature reference, the latterbeing piecewise linear and thereby having discontinuities inthe rate of change. If the “raw” reference is tracked closelyby the controller, it will inevitably result in overshoot,because finite lamp dynamics introduce delays between thefeedback signal and the actuator (i.e., the system is at leastof second order). In addition, the prefilter reducesexcessive control action due to the sudden changes in rate.Figure 9 shows closed-loop response of the system fora temperature spike anneal. Figure 10 shows a comparisonof the closed-loop simulation and actual closed-loopperformance of the system. It shows excellent agreementbetween the model and the data from the RTP The goal of CMP processing is to achieve a specifiedthickness and uniformity in a repeatable fashion. Actuatorsfor a rotary CMP machine are applied pressures, wafer andplaten rotation speeds and slurry flow rate. Sensors forCMP include eddy current and optical sensors formeasuring film thickness, motor current sensors formeasuring friction, and temperature sensors.Currently, Chemical-Mechanical Planarization (CMP)remains the wafer planarization technique forsemiconductor manufacturing. There are more than 500processing steps involved in manufacturing advancedsemiconductor chips, of which 10 to 20 steps involve CMPprocesses. Furthermore, many of the CMP steps occur inthe late stages in the processing of the wafer, thus makingany re-processing very costly. The adoption of copperdamascene technology by the industry has resulted in theneed for copper CMP processes spanning threesemiconductor technology nodes: copper/silicon dioxide,copper/low-k, and copper/ultra-low-k (k is the dielectricconstant). Each of these technologies presents uniquechallenges to the industry. The characteristics of theproblems are smaller features, new materials, and morelayers to control. The issues involve, dishing, erosion,planarity, zonal control, multi-point control, and stress-freeCMP.A schematic diagram of a rotational CMP system isshown in Figure 11. Figure 12 shows a typical CMParchitecture with three platens for planarizing bulk copper,barrier and residual.V. CHEMICAL-MECHANICAL PLANARIZATION: CMPChemical-Mechanical Planarization (CMP) is a critical andenabling step for semiconductor fabrication interconnectstechnology. At the 45 nm, 32 nm, and 22 nm nodes, theplanarization process must take into account theincreasingly more stringent requirements on thickness,spatial uniformity, planarity, conformality, thermalstability, and mechanical integrity.When multiple layers of oxide and metal are depositedonto etched surfaces the resulting surface is typically notflat. CMP is used to produce a planar mirror-like wafersurface for subsequent processing by smoothing anominally macroscopically flat wafer to almost atomiclevel. A typical rotary CMP machine consists of a rotatingwafer pressed onto a grooved rotating platen containingabrasive slurry. The slurry chemically reacts with the wafersurface to be polished, and the pressing rotating actiontypically abrades the surface atomic layer-by-atomic layer.The major problems in CMP are controlling the materialremoval (or, equivalently, the material removal rate) andthe uniformity on each run, and reproducibility from run-to-Figure 11. Schematic of a typical rotational CMP System.Figure 12: CMP system architecture showing 3 platens forApplied Materials Reflexion LK system [15].7

A. Dynamic CMP Model [8]We have developed a static three-dimensional (3D) contactmechanical model that determines the interfacial contactpressure between wafer and platen, based on specific valuesfor load pressure, ring pressure and average frictioncoefficient. In addition, a static kinematic relationship wasobtained between the platen rotational speed and waferrotational speed, and the relative velocity between waferand platen at a given point on the wafer. These staticmodels were combined to compute the static removal rateaccording to Preston’s equation [16]:behavior between the linear and nonlinear model shows agood match in the operating point, and gradual performancedegradation when moving away from the operating point.The full-order linear model was further reduced to a 4output, 4-state, 4-input model for feedback control design.The reduced order linear model was used for feedbackcontroller design using a Linear Quadratic Gaussian (LQG)design technique. Figure 14 shows the closed-loopperformance using a model-based feedback controller thatmeets the specifications in terms of WIWUN and WIDNU.[Å]idh (t )dt K p pci (t )vri (ω p ,ω w ),i 0,1,., Nwhere Kp is Preston’s coefficient (proportionality constant),pci (t ) is the contact (interface) pressure at node i along theradius, and time t, and vri is the time averaged relativespeed between the point of interest on the wafer (i) and itspoint of contact on the pad. The static models wereintegrated into a dynamic model that predicts the waferthickness as a function of time-dependent inputs. Thedynamic model is shown in Figure 13.[mm]Figure 14: CMP

silicon, ingots, are sliced into wafers, ground to a specific thickness (e.g., 300 mm diameter wafers are 0.775 mm thick) and polished to be smooth. A thin layer of epitaxial (i.e., single crystal) silicon, or “epi”, is deposited using CVD and the wafer is ready for use in a fabrication