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Versatile LinkVersatile Link and GBT Chipset ProductionStatus, Issues Encountered, and Lessons LearnedLauri Olanteräon behalf of the Versatile Link and GBT projects

Radiation Hard Optical Link Architecture: VL and GBTGBTVersatile LinkGBTBack-End BoardTiming & TriggerGBTIADAQGBTFPGAGBLDTiming & TriggerPhotodiodeGBTXGBTSCAVersatile LinkDAQLaserdiodeSlow ControlSlowControlCustom ASICsVersatileTransceiverOn-DetectorRadiation Hard ElectronicsACES cial Off-The-Shelf (COTS)2

GBT and VL usersUserLHCFour bigCERN experimentsLHCbVersatile LinkGBTXGBT-SCAVTTxVTRx MM144426357709820762547370CMS HCALCMS GEM510170340510CMS ECAL2304512055CMS CSC650650650ATLAS NSW4266816011771665ATLAS LArg775775ATLAS [email protected]@Fermilab500ACES 24/04/2018100500BE-BI-BLTotalsVTRx [email protected]

Radiation Hard Optical Link Architecture: VL and GBTGBTVersatile LinkGBTBack-End BoardTiming & TriggerGBTIADAQGBTFPGAGBLDTiming & TriggerPhotodiodeGBTXGBTSCAVersatile LinkDAQLaserdiodeSlow ControlSlowControlCustom ASICsVersatileTransceiverOn-DetectorRadiation Hard ElectronicsACES cial Off-The-Shelf (COTS)4

GBT Chipset ProductionGBTX GBTIA4.8 Gb/s TransceiverManages the communicationsbetween the counting roomand the frontend modules 4.8 Gb/s Transimpedance AmplifierAmplifies the weak photocurrentgenerated by the PIN diodeTiming & Slow Control AdapterExperiment control andenvironment monitoringACES 24/04/2018Laserdiode 168 GBTX wafers, 50,000 chips 76 GBLD wafers, 91,000 chips 28 GBTIA wafers, 27,000 chips Custom ASICsGBT-SCA Versatile LinkGBT-SCA: 28 wafers shared with CBC3, 60,000SCA chipsGBLD 4.8 Gb/s Laser DriverModulates laser current to achieveelectro-optical [email protected]

GBTX Production and 0 ers availablePre-pre-prod.packagingEval of CL 1/2Pre-prod.packagingEval of CL sting1000 GBTX GBTX 1/3 GBTX 2/3PackagingGBTX 1/3Confirmation of CL1 year 8 months Versatile LinkPackagingGBTX 2/3FebTestingGBTX 3/3PackagingGBTX 3/3GBTX quantity:1/3 138482/3 145943/3 2006948,237 devices tested, 45073 good yield 93.4% 50% of ordered GBTXs delivered to usersLessons learnt: Take purchasing procedures and other delays into account early in the process.This was a significant factor in case of the GBTX packaging. However, to properlyplan and start packaging in time, some technical details (e.g. chip pin out) have tobe defined early on. ACES 24/04/2018Crystals: expensive components which require a lot of evaluation and longproduction. Try to [email protected]

GBT-SCA Production and Testing2016AugSepOct2017NovDecJanEng. run order. Wafers available in Q4FebMarAprDicing/Packaging2,500 chipsMay JunJulDicing/Packaging24,948 chipsTesting at CERNfor early deliveries616 chips Versatile LinkProductionTesting26,932 chipsProduction testing yield: 94.4%. Majority of failures due to Null power consumption (2.9%)E-port or internal control (1.21%)Communication interfaces (0.96%) 75% of the ordered GBT-SCAs delivered to usersACES 24/04/[email protected]

GBLD and GBTIA Production and Testing2015GBLDAugSepWafers available: 24 Oct25 AGBLD Testing SepOct NovMore than enough good chips forVTRx production JanFebDicingGBTIA testing13 wafersMarAprPackagingduring VTRxproductionAlready enough good die for VTRxproductionRemaining 14 wafers were testedand diced later in 2016 GBLD package (QFN24) and used testsocket were very picky about thecontact forceAll failures were re-testedDecThe first 14 wafers were tested(wafer probed) Biggest issues were contact problems Aug2016Wafers availableDicingGBTIA testing1 waferMore than 90,000 GBLDs were testedfocusing on the important dynamicperformanceYield 99% Versatile LinkNot used in VTRx productionGBLD test setupACES 24/04/[email protected]

Encountered Issue: GBLD bias current Versatile LinkToo many bad eye diagrams measured during VTTxpre-series QA (the first module pre-series)Lasers are driven below threshold current? Bad lasers slipped through the QA? Assembly damage?None of the above: a large spread in bias currentsgenerated by the GBLD laser drivers Manual testing of 1000 GBLDs to understand thedistributionDefine grading system that guarantees correct operation:Grade A for VTRx, Grade B for VTTxRe-testing all GBLD drivers20152016Aug Sep Oct Nov Dec Jan Feb Mar Apr May Jun Jul Aug Sep Oct NovWafers availableGBLD TestingGBLD re-test completedA lesson learnt:Understand how variations in all parameters, even the “simple” ones,affect the system performance. Simulate and specify what can beallowed, so that you have something to test against.ACES 24/04/[email protected] Gain real bias current / bias current setting ideally always 19

ASIC Cost Breakdown ExamplesVersatile T-SCATesting17%Dicing/Packaging17%Wafers66%ACES 24/04/[email protected] GBT production overall cost: 2 MCHF10

VTRx Production StatusGBTVersatile LinkVersatile LinkGBTBack-End BoardTiming & ng & TriggerDAQLaserdiodeSlow ControlSlowControlCustom ASICs VersatileTransceiver5 cmOptoelectronic transceiver operating at 4.8 Gb/sVTTx version with two transmitting channelsSources radiation-hard ASICs from GBT projectACES 24/04/[email protected]

Versatile Link Project – Planned TimelineVersatile LinkProduction planned October 201220082009201020112012201320142015Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4Phase 1: Proof of ConceptPhase 2: FeasibilityPhase 3: Pre-prod readinessMS EvaluationITPre ProductionMS Market SurveyIT Invitation to TenderSo, this is a status review after three years of heavy use of VTRx modules?ACES 24/04/[email protected]

Versatile Link Project – Planned TimelineVersatile LinkProduction planned October 201220082009201020112012201320142015Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4Phase 1: Proof of ConceptPhase 2: FeasibilityPhase 3: Pre-prod readinessMS EvaluationITPre ProductionMS Market SurveyIT Invitation to TenderSo, this is a status review after three years of heavy use of VTRx modules?Not quite, but a lot has changed since this plan was drafted: VTRx/VTTx total production quantity from 8,900 to 40,000! Confirmed users from 4 to 13 and LS2 was first planned for 2016, then for 2018, then for 2019-2020.ACES 24/04/[email protected]

Versatile Link Project – What Actually Happened201120122013201420152016Versatile Link20172018Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4Phase 3: Pre-prod readinessTOSA transmitter sub-assemblyDRMSROSA receiver dQAContractPreProductionMS PEsignedQAPreProductionDRPEQAPreDRPEQAOrder Orderplaced placedPhase 2: FeasibilityLessons learnt from this timeline: Funding model for common projects needs to be worked out beforebeing able to commit large sums of money Commercial actions (in red) can take significant amount of time You can’t have too much time for QAACES 24/04/[email protected] ProductionAdditional ProductionProductionDR Department requestMS Market SurveyIT Invitation to TenderPE Price Enquiry14

What takes time in QA?Versatile LinkPre-production Qualification for optical sub-assemblies and VTTx/VTRx modules: Functional Room temperature static and dynamic testsTemperature Operation across the specified temperature range of -30 to 60 CMagnetic field Operation tested in 7 T magnetic fieldIrradiation up to 5 1014 n/cm2 Laser and photodiode samples from all production wafersFully assembled modulesModule Reliability Temperature cycling: 500 cycles -40 to 85 CHigh temperature storage test: 2000h in 85 CACES 24/04/[email protected]

Encountered Issue: VTRx pre-series example Versatile LinkBad yield due to problems with the receiver side Not acceptable for series productionInvestigations showed that the problem was in theflexible circuit board. Not as flexible as TOSA’s.Assembly becomes more difficult and the flex ismore easily broken when bent.A mold had to be developed to guide the flex intothe right shape, which minimized variations in themanual assembly process.Testing the mold, testing that it really reduced thefailures.ROSA flexA lesson learnt:Make big enough pre-pre-series with the final parts, sothat you understand the difficult steps in the assemblyprocess and have time to modify the process or tochange the component specifications. or be prepared to have several post-pre-series trials,when small changes may already be expensive.ACES 24/04/[email protected]

VTTx/VTRx QA During Series ProductionReception ofcomponentlots Sampling andacceptancetestingShipping ping toCERNSampling andacceptancetestingVersatile LinkFinalpackagingAll assembled modules are tested at theassembly houseAll received component- and module lots gothrough lot acceptance at CERNSome “VTRx testing at CERN” -numbers: TOSA: 64,600 received, 1,361 tested (2.1%)ROSA: 22,976 received, 554 tested (2.4%)VTTx/VTRx: 30,750 received, 1,032 tested (3.4%)so far Lot of unpacking, sampling, testing, packing,labeling, shipping, reporting ACES 24/04/2018A lesson learnt:Outsource, or get awesome technical students (work represents 1 FTE for the duration of the project)[email protected]

VTTx and VTRx Production Rate and YieldVersatile LinkYieldsper lotPre QA Pre QAWe have reached the ordered quantity with VTTx and about to reach it with VTRx.66% of VTTx orders and 44% VTRx MM orders delivered.We have a good stock of modules ( 10,000) ready waiting for the users.ACES 24/04/[email protected]

GBT-FPGAGBTVersatile LinkVersatile LinkGBTBack-End BoardTiming & ng & TriggerDAQLaserdiodeSlow ControlSlowControlCustom ASICsVersatileTransceiver ACES 24/04/2018Gigabit transceiver IP (@4.8Gbs) with encodingTargets FPGA from Altera and XilinxTransmits TTC and EC data to the on-detector electronics aswell as receives and forwards detector data to the central [email protected]

GBT-FPGA Versatile LinkVersatile Link Demo Board (VLDB):The GBT-FPGA core development has been completed E-linksLatest release 6.0.0 in March 2018 with improvements and bug fixesVery likely the last major release (resources focused now on lpGBT)VTRx Majority of users access front-end through GBT-FPGA Plenty of users for the library GBTxDCDCs 150 users in the GBT-FPGA user e-groupGBT-SCA A lot of work still goes into the user supportACES 24/04/2018Lessons learnt: High level model for front end needed for simulations Especially because the next generation link is notsymmetric no simple loop-backs The IP must be as generic as possible High performance options, such as optimized latency,require deep FPGA design understanding from the users.Not to think as plug-and-play [email protected]

SummaryVersatile Link GBT chipset production has been completed and we are ready to deliver all ordered ASICs Versatile Link production is running smoothly About to reach the ordered module quantitiesProduction will run for few more monthsA lot of valuable experience for the new productions: lpGBT Status and Plans: Szymon Kulis 14:30Versatile Link Plus Status and Plans: Francois Vasey 15:00ACES 24/04/[email protected]

Useful Links Versatile LinkThe GBT and Versatile Link teams have created a forum on GBT chipset and Versatile Link,allowing users to exchange views and experience related to GBTx, GBT-SCA or VTRx:[email protected] GBT RT More information about the projects can be found pace.cern.ch/project-versatile-link/public/ How to order GBT & Versatile Link versatile-linkACES 24/04/[email protected]

Versatile LinkACES 24/04/[email protected]

Lot acceptance data examplesVersatile Link The main transmitter side parameters from VTTx lot acceptance tests (94% completed production): Sensitivity and total jitter as examples of receiver side performance. VTRx lot acceptance (58% complete production):ACES 24/04/[email protected]

Versatile Link GBT-SCA Production and Testing ACES 24/04/2018 [email protected] 7 2016 2017 Aug Sep Oct Nov Dec Jan Feb Mar Apr May Jun Jul Eng. run order. Wafers available in Q4 Dicing/ Packagi